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  • [MUSIC]

  • So, your like, a lot of our other lectures, I want to start with some news.

  • This was over the summer, this article came up On the front page.

  • Not the front page of Wall Street Journal, but the front page of the

  • technology section and it says that you

  • know flash memory have suddenly become hot.

  • Especially for for application into the storage space, cloud

  • computing and it said you know flash memory celebrating its 25th year.

  • since its invention this year.

  • So we'll talk later.

  • I'll try to you know, give you some perspective

  • why this is the case, why this is happening.

  • And, this is

  • another thing which was later part of last year actually.

  • More than a year ago, and it says this the

  • latest flash memory chip you can buy, the most advanced one.

  • It says it's a 64 Gigabit die, or if you

  • convert it into byte, it's a 8 Gigabit. Eight Gigabyte times the

  • different between beta byte is beta usually a small b byte of the capital b.

  • So keep those in mind when you read news articles like that.

  • It also says that It's a two bit per cell, so x2

  • and you'll see this done again, x2, x3, x4, so we'll talk about what that means.

  • And another thing is that it says 90 nanometer but we'll

  • see later that it's not exactly 90 nanometer, bi 90 nanometer.

  • It's actually one of these two.

  • Either the bit line or the word line.

  • One of them is more closer to each other rather than the other.

  • So,

  • [COUGH],

  • earlier in the first lecture, I asked you

  • to name semiconductor companies, in the Bay area.

  • None of you, actually, I was very disappointed

  • that none of you named any of these companies.

  • There'll all flash memory companies, mostly located, in the Bay area.

  • In fact, this is a very hard segment of the market now.

  • Last year it says four, $400 million of venture capital were invested in

  • these companies. I see the number, correct number is 389

  • million, but That doesn't sound as good but so, the thing we were answer is what

  • do they do and why, why is there so much venture capital action in this space?

  • So you, these are common application of flash memory

  • you must have seen USB back in the 2000 2004.

  • IPod Nano. IPhone, MacBook era,

  • more recently iPad and tablets. And what has resulted,

  • because of that, is that this market, which has NAND flash.

  • So there's two kinds of flash, the NOR, which is

  • in white and the NAND flash which is in blue.

  • So that has really exploded in this post-PC era.

  • In 2010 it was close to a $20 million market.

  • And the question now is that is it going to saturate or is it going to.

  • That going to actually saturate or its going to continue growing.

  • So think about it.

  • You know, you already have all this tablets,

  • and smart phones, but they, so they put

  • out different models, right?

  • It's 8 gig, 16 gig, 32 gig most of the people actually

  • seventy, more than 70% of the people buy the lowest capacity one.

  • And their preferring to store their data over the cloud.

  • Apple has a solution right?

  • Dropbox. Box google drive.

  • And all these companies are not they're still hard disk based.

  • The company which stored in the clouds.

  • The questions is it going to saturate or is it going to continue growing.

  • And the good answer is a lot of cloud storages are soon moving to flash memory.

  • So, you might have I'm sure all of you use You know, some

  • of you might use Chrome, a lot of you might have used Google search.

  • This product right, where you start typing and it gives you the

  • [INAUDIBLE].

  • And it's all enabled by storing the whole internet on a NAND flash memory.

  • Google in fact is one of the largest buyers of

  • enterprise. Kind of, flash storage disk.

  • And there's a huge advantage you get in terms of,

  • power if you move from hard disk drive to flash.

  • And that's actually a more of a driving factor then, then the,

  • then the speed because.

  • As we'll see later, storing or writing into flash is much more energy

  • efficient as compared to a writing on a, on a flash disc drive.

  • So with that introduction, what I will do first, is to cover some basics.

  • Of flash memory, so we will cover four

  • things the different, two different architecture, NAND and NOR.

  • I will

  • cover how do you program a flash memory cell, how do you erase it.

  • Then how long you can store it which is also called retention.

  • How many times you can read and write to it, which is called endurance, or

  • [INAUDIBLE]

  • cycling.

  • And then the last thing is this multi-level flash, that

  • is, having one cell but storing multiple bits, into it.

  • So, there essentially two different architectures that you can help a flash.

  • One is a NAND and the other is NOR.

  • The differences is that in the NAR architecture, you have your

  • bit line, which is the, this black contact or her connecting to each of your cells.

  • So you can, if you look at the. Take diagram here, you can essentially,

  • if you look at the circuit diagram here

  • you can individual address each of the cells.

  • So you can select a particular cell, selecting this bit line and you

  • can select the board line and you can address each of the other cell.

  • Compared to a NAND, essentially you get rid of all these black contacts, so you

  • have All these cells connected in series. And the only way you

  • can address one cell is that if you address all of the rest of the others.

  • So if want to you read this cell you first have to turn on all these other cells.

  • What the advantages are as you can see this

  • is much more compact as compared to this one.

  • So this has a feature size of close to 4F squared, between four and 5F squared.

  • This one has a feature size of 10F squared even though

  • these two cells share one bit line contact, so you drop one for two.

  • But since the design rules for dropping a contact are

  • more relaxed, since this is dropping from a different layer.

  • You essentially get twice the area as compared to this one.

  • So you get A feature size of 10 f square so the

  • [INAUDIBLE]

  • is described as nine.

  • You get five squared or you get 10 squared.

  • Similarly if you want to read a cell here, you can

  • very quickly read it in a matter of tens of nanoseconds.

  • Data memory if you know it is has a similar read latency.

  • Nine flash if you read once you need to turn all

  • of them and then only you can access so it has a

  • read time of a few microseconds. So its as you can see it is much

  • slower to read but The best analogy

  • I've seen is that, this is like living in your own house.

  • You can get out on the road as you want.

  • This is like living in an apartment building,

  • multi-story apartment building, whenever you get out you

  • have to walk through all of the other floors.

  • You have to disturb all of the people

  • around you, but that's a good analogy to understand.

  • >> Question. >> Yes.

  • >> When you talk about the cell size >> Yes.

  • >> What's the definition of one f

  • >> So, F is the minimum feature size you can print, so suppose you can print

  • feature size of f, you have to separate them by the feature, by a feature size

  • of F2.

  • So you get like two F, and similarly two F in this direction for four F squared.

  • [COUGH]

  • So, the reason why it's called NOR and NAND is because it, the circuit

  • diagram, at least, has some resemblance to how NAND and NOR gates look.

  • If you look at.

  • From our NOR gates, from your basic

  • electronic class, it has essentially, if you need

  • to perform any operation on these, signal has to pass through both A and B.

  • As compared to NOR,

  • each of them has their individual contact to the ground.

  • So that's why it's called NAND or NOR, even though it's a memory

  • device, because it looks similar to this stick, similar to this circuit diagram.

  • So, as I described, you know, that

  • Since you, don't have this base line contact between two adjacent

  • scales, you can pack the total Say, so, in this case

  • if you have eight cells and if I draw them in a NAND fashion.

  • I'm convening this much length, 59 micron.

  • But if I disconnect them in a NAND

  • fashion, I'm convening half the length or five microns.

  • So. Even though there are

  • disadvantages of living in an apartment

  • building you can get significant cost advantages

  • and this is a more realistic Picture of actual cross-section of cells connected.

  • And here you can see there's in a NOR flash you need to drop this contact

  • between two, between each of these two cells you have to drop these Contacts,

  • as compared to a NAND it looks very

  • clean the NOR contacts.

  • The only contact you have is towards the beginning and toward the end of a string.

  • So you get half the area, as compared to 10F square,

  • you get 5F square, and you get half the price as well.

  • Since Half the area and it's you can pack twice the

  • cells so it's half the price. And that's why this market has NAND,

  • has grown much more faster at as

  • compared to NOR. Sometimes at the let's

  • try to displace both NOR. And the NAND because it's essentially

  • so cheap because you can fabricate it so compactly.

  • So

  • [INAUDIBLE]

  • come to how, how this works. So to understand how it works.

  • We can borrow this equation from our from 216 or similar

  • device class, where you might have studied the threshold voltage.

  • And it depends upon these normal terms, but it also has these

  • terms so what if there's some charge trapped in your mass capacitor?

  • So if there's some

  • charge trapped in your mass capacitor at the distant of DT from your top gate.

  • Your special threshold will shifts by this amount.

  • That is Q is the amount of charge trapped into

  • your distant divided by the direct constant of your insulator.

  • And you can re-arrange this down, that is you can divide

  • this epsilon by DT, and that will give you that capacitance term.

  • So what happens is

  • that if you don't have any charge, you have threshold, if

  • you have some charge trapped in there, you get a different threshold voltage.

  • So, the flash memory is essentially, is nothing but, it's a

  • more convenient way of Trapping charge in your gate stack.

  • So, this is

  • how it looks like.

  • So you have a source hindrance and alert to

  • what you have a nanometer transistor, but you have

  • this extra tank, all of the floating it and

  • it's floating because there's no terminal available to it.

  • You can see that three terminals sticking here,

  • [UNKNOWN]

  • drain and again.

  • So there's no terminal connecting the floating gate.

  • And it has, it's separated from this channel by this oxide which is called as

  • tunnel oxide and it's called tunnel oxide because

  • you can, most of your tunneling of electron

  • [UNKNOWN].

  • It occurs from the channel into the floating gate through this oxide.

  • So that's why it's called tunnel oxide.

  • This one is called IPD or inter poly dielectric.

  • this floating gate and the control gate are made out of poly silicon.

  • So, it was separating to poly materials.

  • That's why it's called a interpoly dielectrics.

  • So, again, what will happen if you don't

  • have any charge, you get one threshold voltage and

  • if you store charge, you get another threshold voltage.

  • So, that's how this otherwise works.

  • And so depending on upon whether, if you have charge no charge stored

  • over here, your electrons can easily flow from your source to your drain.

  • As compared to if you have charge

  • present in your control gate.

  • It prevents that electrons from flowing, because these

  • electrons will try to repel electrons in the channel.

  • And you have to apply a extra gate voltage to allow that flow of the current.

  • So what you do is essentially you, how you read the sale

  • is you apply a certain voltage which is in between these two states.

  • So depending on whether there's charge or not.

  • If there was no charge,

  • you will get a high current and if

  • there was charge present you will get no current.

  • And To program it, it is the same which I just described to you.

  • You either either apply a high positive voltage on your control

  • gate, or you apply a high negative voltage on your control gate.

  • So, in reality you don't get one threshold voltage, you get a distribution of them.

  • So, you will get a distribution of voltages in your

  • erase state, and you will get a distribution of voltage

  • [UNKNOWN]

  • your program state.

  • When you want to write the cell you tunneled

  • your electrons from your channel into your floating heat.

  • When you erase that you tunnel that out from the floating hit into the channel.

  • And this is again as I just explained, if you want to

  • read them you apply this particular voltage on the cellular of these.

  • But the problem is, or not the problem but the limit there to your reading

  • speed is you need to turn all of these other cells off of your neighbors above

  • and Below to to get to the cell, or get to the part

  • where you want to reach. So, what you do is on those other cells,

  • you apply a voltage, which is high enough, such that you definitely turn them on.

  • So on those other cells you apply, which is called the pass gate voltage.

  • Essentially allow them to pass, allow them to conduct and

  • this is what limits the speed at which you can read that particular cell.

  • [UNKNOWN].

  • It also causes a lot of disturbs

  • because The unintentional consequences of applying this voltage

  • you might softly program a cell or you might disturb a cell adjacent to it.

  • So, this is one of the limitations of a

  • NAND flash or a NIND architecture for a memory flash.

  • So I want to

  • go through this rather quickly with this is a snapshot from one of the videos.

  • So to understand this how this the voltage in your

  • floating gate is related to the rest of the electrodes.

  • You can write the simple q equal to cv relationship and you can.

  • relate your floating gate voltage to all the, capacitances.

  • And, what you can

  • do is then rearrange these terms such that you,

  • write them in terms of your floating gate voltage.

  • So I want to Let's take one minute to explain what this final relationship is.

  • So this final relationship is what is relating your floating gate voltage.

  • And there are two main things we want to relate it to what voltage you

  • apply on the control gate and how much charge is stored in the floating gate.

  • And you can see in this relationship, this floating gate voltage is related

  • to your control gate voltage by this thing I'm calling as gate coupling ratio.

  • Which is the ratio of my capacitance with the

  • control gate divided by the total capacitance of the cell.

  • And the general, you know, industrial practice,

  • you want to keep this At least above,

  • 0.6 for the cell to work, properly.

  • In general, you want to keep it as high as possible

  • because you want, as soon as you apply something on the

  • control gate, you want you're set it to get program fast

  • or you want to get transfer that voltage to your floating gate.

  • But usually what you achieve in practice is close to 0.6.

  • And then its related to this charge on the

  • floating it simply by the charge divided by total

  • capacitance or the self capacitance. So this an important relationship to keep

  • in mind, to understand how the cell, will work.

  • So essentially if you apply high voltage on your, control gate.

  • Suppose say you apply, 10 volts. On your control here.

  • it will transform to say 0.6, not 0.6, 607 words on your floating eight,

  • similarly if you apply minus 10 it will

  • correspond to minus 67 on your floating eight.

  • Another thing to understand needed to understand the

  • flash memory is essentially is the tunneling phenomenon.

  • and again, you might have covered this already in your device

  • course, but just devise you, you have different regimes of tunneling.

  • One is if you, first of all, if you

  • don't have any potential difference between your two electrodes,

  • there's no tunneling across that dielectric.

  • If you have a very high potential difference, you see a,

  • triangular barrier for these carriers to tunnel from here to here.

  • And that's called a

  • [INAUDIBLE],

  • or

  • [INAUDIBLE].

  • And the other one is if your voltage is somewhere in between.

  • If its higher than zero, but its not as high as

  • [INAUDIBLE]

  • .

  • So your electrons see this trapezoidal barrier

  • for timing, and its called a direct timing.

  • And if you plot your gate current in a capacitor as a function

  • kind of structure as a function of your gate voltage.

  • You can clearly identify these three regimes.

  • So you'll have very low current that is essentially not energy.

  • Then you'll have a very large dependents

  • on your, gate voltage that's typically, or, Your

  • direction energy and then you have, a very high current but a weaker gate voltage

  • [INAUDIBLE]

  • that is your, fowler

  • [INAUDIBLE]

  • energy.

  • So when you program a cell, you typically

  • apply a very high voltage, and you operate,

  • In a Fowler-Nordheim tunneling regime, when you retain

  • that charge, you want essentially low potential difference.

  • And you want to be in this regime where this no tunneling happening.

  • [MUSIC]

[MUSIC]

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